Many (core) Moore (Part III computing Epoch)

Back to the past – This is part III of four part story of the computing epochs as punctuated by Moore’s law in which Intel had its imprint for obvious reasons.

This is the 2003-2020 Era, in which multi-core, Open source, Virtualization, cloud infrastructure, social networks all blossomed…The onset of it was the end of MHz computing (Pentium IV) to multi-core and throughput computing.

It was also the beginning of my end in semiconductors for a brief period (20 years) until I decided its time to get back in the 2020s…That was punctuated by the first multi-core CPUs (mainstream) that Sun enabled – famously known as Niagara family and of-course the lesser know is UltraSPARC IIe which has an interesting contrast to Intel’s Banias (back to Pentium).

Some would call it Web2 era or Internet 2 era…The dot-com bubble which blew a number of companies in the prior era (OEM era), paved the way for new companies to emerge, thrive and establish the new stack. Notably at the infrastructure level, Moore was well ahead with first multi-core CPUs enabling virtualization and accelerated the decline of other processor companies (SPARC, MIPS), system OEMs as the market shifted from buying capital gear to cloud and opex.

Semiconductors investments started to go out of fashion as Intel dominated and other fabs (TI, National, Cypress, Philips, ST and many more withered) leaving Intel and TSMC with an also-ran Global foundries. In the same period, architectural consolidation around x86 happened along with Linux, ARM emerged as the alternative for. a new platform (mobile) via Apple. Looking back it was the value shifting from vertical integration (fab + processors) to SoC and thus IP (ARM) became dominant despite many attempts by processor companies to get into mobile.

Convergent to the emergence of iPhone/Apple/ARM, was AWS EC2 and S3 and thus the beginning of cloud with Opex as the new buying pattern instead of capex. This had significant implication as a decade later that very shift to commodity servers and opex comes full circle via Graviton and TPU with the cloud providers going vertical and investing in silicon. Intel’s lead on technology enabled x86 to dominate and when that lead in technology both slowed thanks to Moore’s law and TSMC, the shift towards vertical integration by the new system designers (Amazon, Google, Azure).

Simultaneously, emergence of ML as an emerging and significant workload that demanded new silicon types (GPU/TPU/MPU/DPU/xPU) and programming middleware (TensorFlow and PyTorch) broke the shackles from Unix/C/Linux to new frameworks and new hardware and software stack at the system level.

Nvidia happened to be at the right time at the right place (one can debate if GPU is the right architectural design), but certainly the new category or the tea leaves for the new system which is a CPU + xPU seeds were sown by mid 2010s….

All of the shift towards hyper scale distributed systems was fueled by Opensource. Some say that Amazon made all the money by reselling open source compute cycles. Quite true. Open source emerged and blossomed with the cloud and eventually the cloud would go vertical and raises the question – Is open source a viable investment strategy especially for infrastructure. The death of Sun microsystems was led by open source and. the purchase of RedHat by IBM formed the bookends of Open Source as the dominant investment thesis by the venture community. While open source is still viable and continues to thrive, it’s not front and center as a disruptor or primary investment thesis by end of this era as many more SaaS applications took the oxygen.

We started with 130nm 10 layers of metal with Intel taking the lead over TI and IBM and ended with 10nm from TSMC taking. the lead over Intel. How did that happen? Volumes have been written on Intel’s mis-steps, but clearly the investment into 3DXpoint and trying to innovate or bet with new materials and new devices to bridge the memory gap did not materialize and distracted. Good idea and important technology gap need, but picking the wrong material stack distracted.

The companies that emerged and changed the computing landscape were VMware, Open Source (many), Facebook, Apple (Mobile), China (as a geography ). The symbiotic relationship between VMware and Intel is best depicted in the chart below.

Single core to dual socket multi-core evolution…

On networking front The transition from 10Gbps to 100Gbps (10x) over the past decade is one of the biggest transformation of networking adoption of custom silicon design principles.

Above chart shows the flattening of the OEM business while the cloud made the pie larger. OEMs consolidated around big 6 (Dell, HPE, Cisco, Lenovo, NetApp, Arista) and rest withered.

GPU/xPU emerged as a category and along with resurgence in semiconductor investments (50+ startups with $2.5+B of venture dollars). Generalization of xPU with a dual heterogenous socket (CPU + xPU) is becoming the new building blocks for a system, thanks to CXL as well. The associated evolution and implications for the software layer was discussed here.

We conclude this era with the shift from 3-tier enterprise (‘modern mainframe’) stack that was serviced by OEMs to distrbuted systems as implemented by the cloud providers where use case (e-commerce, search, social) drove the system design whereas technology (Unix/C/RISC) drove the infrastructure design in the prior era (a note on that is coming…)

In summary – Moore’s law enabled multi-core, virtualization, distributed systems, but its slowdown of growth opened the gates for new systems innovation and thus new companies and new stack including significant headwinds for Intel.

Lets revisit some of the famous laws by famous people…

  1. Original Moore’s law – (cost, density)

Bill Joy’s change it to Performance Scaling. Certainly slowing down and shift in performance moved to throughput over latency. Needs update for ML/AI era, as it demands both latency and throughput.

2.Metcalfe’s Law – Still around. See the networking section.

3.Wrights Law (demand and volume) – https://ark-invest.com/articles/analyst-research/wrights-law-2/ – this predates moore’s law and now applies to many more domains – battery, biotech, solar etc…

4.Elon’s law – (A new one…) – Optimal alignment of atoms and how close to that is your error. We are approaching that.

5.Dennard Scaling – Power limits are being hit. Liquid cooling is coming down the cost curve rapidly.

Intelligrated ……

Ben Thompson of Stratchery in his recent blog on Intel Split prompted me to coin the word “Intelligrated“, which is a counterpoint to his thesis. – No, its not in the dictionary. Before we get to that, lets start with one topic he brings up as it is near and dear to me and many of my old fellow chip nerds from that time (1987-2003) which I would call as EDA 1.0 era.

EDA changed microprocessor roadmap starting Circa 1987 and continued through late 1990s: Ben references Pat’s paper on Intel EDA methodology which scaled design methodology to track moore’s law. Intel invested heavily in EDA internally as the industry was immature. Around the same time Sun Microsystems which built its business selling EDA/MCAD workstations was changing the industry EDA landscape (methodology and eco-system). [An aside: Would not be surprised if x86 CPUs till Pentium IV, were designed using Sun workstations]. Both companies had parallel but different approaches.

EDA 1.0: Intel vs Sun approach: Sun’s approach was industry tools and if it does not exist enable the industry eco-system to be built. It perhaps started in 1989 when a motley crew (25) of engineers (including yours truly) built the first CMOS SPARC SOC (Tsunami – referenced here) with no prior experience in custom VLSI. We all came out of a cancelled ECL SPARC microprocessor where none of us had done any custom VLSI design. The CAD approach was…

Necessity is the mother of invention. Sunil Joshi captured the EDA methodology then in the MicroSPARC HotChips presentation. 486 (Pat’s chip) had 1.2M transistors (100+ engineers perhaps) vs the more integrated MicroSPARC at 800K transistors that came 2 years later (same time as Pentium which had 200+ engineers) but a full SOC. AS noted, we had only 2 mask designers and every engineer had to write RTL, synthesize, verify, do their own P&R, timing analyze and two of us built the CAD flow so that it can be push button. Auto-generated standard cells were automatically P&R using compiler tools. That was not the norm for ‘custom VLSI’ circa 1991 for that scale.

That eventally got the name ‘Construct by correction vs Correct by construction’ and throughout the 1990s, this evolved, scaled and made the processor design competitive as well raised a lot of boats in the EDA industry that evenutally got Intel to adopt industry tools with a healthy mix of in-house tools. With no in-house EDA teams, we creatively partnered (Synopsys, Mentor), invested (Magma, mid 1990s), helped M&A (gateway design – verilog, Cooper and Chyan – Cadence), spin-out (Pearl timing analyzer to replace motive). At the same time IBM EDA tools which were superior to both Sun’s approach and Intel, but was locked up inside IBM until later in the decade, when it was too late.

In parallel, there was a great degree of systems innovation (SoCs, glue-less SMP, VIS, Ethernet, graphics accelerators, multi-core+threading) that was enabled by EDA 1.0 and CMOS custom VLSI by the industry at large with Sun leading the parade. Allow me to term it as ISM 1.0 (Integrated Systems).

Now IDM 1.0 is what made Intel successful to beat all the RISC vendors. We (Sun and compatriot RISC vendors) could beat Intel in architecture, design methodology and even engineering talent and in some cases like Sun which had OS and Platform built a strong moat. But, we could not beat Intel on manufacturing technology. Here’s a historical view of tech roadmap.

Tech History (litho nm only)

Caution: Given dated history, some data from 1990s could be incorrect – corrections please notify.

In a prior blog I have called out how Intel caught up with TI and IBM on process technology by 1998 (they were the manufacturing leader but not the technology leader w.r.t xtor FOM or metal litho until 1998). TI Process technlogists used to complain ‘At Intel design follows fab and you folks are asking fab to follow design’ as we demanded xTOR FOM and Metal litho more than Moore in the 1990s. By 1998 with coppertone, Intel raced ahead with both litho as well as xtor FOM (60% improvement in 180nm with coppertone to boost Pentium MhZ). So Intel was not xtor FOM leader in early 1990s, but they pulled ahead by 1-2 generations by late 1990s. It has been done by Intel. When they did go ahead is when IBM and TI became non-competitive (starting 1998) for high end microprocessors and the beginning of our end and my departure from microprocessor (unless I go to Intel). (Side note: Both TI and Intel bet on BiCMOS till 650nm). Unlikely history will repeat itself as the dynamics are different today with consolidation, but it has been done before by Intel.

Intel’s leadership with IDM 1.0 and co-opting ISM 1.0 architectural elements (by 2002 – multi-core, glue-less SMP, MMX, integrated DRAM controllers) into its processors made it difficult for fabless CPU companies to thrive despite having systems business to fund – which was not sufficient by 2002. Even 500K CPUs/year (Sun/SPARC) was not economically justifiable. IBM, SGI, HP and many more esp. dropped as cost of silicon design and tech went up. [Side note: I am not sure on a standalone basis Graviton is economically viable for Amazon – if 500K CPUs was not viable in 2000, 50K is certainly not viable in 2020 – but sure they can wrap other elements in the TCO stack to justify for a few generations – not sustainable over 3-5 generations). Regardless, 20 years later…

IDM 2.0 is a necessary first step and good that Pat & Intel are putting that focus back. But IDM 2.0 needs ISM 2.0 and the same chutzpah of late 1980s of design EDA innovation but this time perhaps own the ‘silicon systems platform SW stack’.

ISM 2.0 is ‘Integrated Systems 2.0’. If SoC were the outcome of Moore’s law in the 1990s, SoP (Systems on Package) is the new substrate to re-imagine systems as the platform is becoming heterogenous for compute (CPU, DPU, IPU, xPU), Memory (DRAM, 3D xpoint, CXL memories) and Networks (Ethernet and CXL). There will always be a CPU (x86 or ARM), but increasingly we will find a DPU/IPU/XPU in the system that sweeps all the new workloads. The IPU/DPU/GPU/XPU will increasingly be an SoP with diversity of silicon types to meet the diversity of workload needs. But it will need a common and coherent software model to be effective in enabling platforms and workloads including low level VMs or run-time with standard APIs (e.g. P4/Sonic, Pytorch+TF and others).

On economies of scale which killed the RISC revolution (amongst other reasons), I have written about SoC vs SoP in a different blog here, but its important to consider the diversity of customers from OEM platforms to cloud platforms, emerging telco/edge service providers, and emerging ML/AI or domain specific service providers that have a large TAM. Each one needs customization i.e. no more one size fits all platforms, its multiple chips into multiple SoPs to different ways to package and deliver to these new channels of delivery – OEM (Single System), Cloud (distributed systems) and emerging decentralized cloud. But to retain the economies of scale of chip manufacturing while delivering customized solutions to the old and new category of customers, we are moving towards disaggregate at the component level and aggregation at the platform software level.

Just to get a better sense of varied sales motion- Nvidia is a chip company, a box company (mellanox switches and DGX) as well as a cloud company (delivering ML/AI as a service w/Equinix).

This is more than Multi-core and Virtualization that happened in Circa 2003 (VMware). An entire new layer of software will be a key enabler for imagining the new ‘integrated systems’ and delivery of them. For lack of a better TLA , let me call it EDA 2.0. The design tooling to assemble these variety of SoP solutions requires new design tooling to enable customization of the ‘socket’. The old mantra was sell 1 chip SKU in millions. That is still true. But we will have multiple SoP SKUs using the same multi-million unit chip SKU. The design tooling to assemble these SoP has not only manufacturing programmability but in the field as there will be some FPGA elements in the SoP as well as low level resource management functionality.

Hijacking the OSI model as a metaphor to represent the infrastructure stack…..

7 layers of Infrastructure Stack
Bottom 3 layers form the emerging silicon systems plane

The homogenous monolithic CPU has now become heterogenous CPU+DPU/IPU/XPU/FPGA. Memory from being homogenous DDR to DDR + 3Dxpoint on DDR bus and CXL bus.

So ‘Integrated Systems’ is an assembly of these Integrated chips based on target segments and customers, but have to manage the three axes of flexibility vs performance vs cost. While silicon retains that one mask set for most target segments (economics), the customization at the packaging level enables the new ‘integrated system’ (the bottom three layers in above visual) . This new building block will become complex over time (hardware and software) thus value extraction (simplification of complexity results in value extraction) but requires capital and talent. Both exists ironically either with the chip vendor or with the cloud service provider, the two ends of the current value chain.

The pendulum is starting swing back from the vertically integrated chip company (1980-2000) to the era when OEMs owned Silicon (Sun, HP, IBM) or chip companies owned fab (Intel), to Horizontalization with the success of fabless chip (Nvidia, Broadcom……) + TSMC (2000-2020) to again vertical integration at sub-system level for certain segments or markets.

Back to Intel Split vs Intel Integrated. In this era, if there is any lesson learnt from the EDA 1.0 era, it would be smarter to do a build, buy and partner i.e. build the new tooling (EDA 2.0 and BIOS 2.0) in a smart combination of build, buy, partner and expand into invest, open source and build a moat around that eco-system that will be hard for competitive chip companies to compete. EDA 2.0 is not the same as EDA 1.0 – its both design tools pre-manufacturing and low level programming and resource management frameworks. Directionally some of it is captured here by Chris Lattner ( MLIR & CIRCT). We have a chicken and egg situation that to create that layer we will need new silicon constructs, but to get to the right silicon, you will need the new layer (akin to how Unix+C enabled RISC and RISC accelerated Unix and C eventually referenced here..)

Coming back to Intel v TSMC and splitting, TSMC is good at manufacturing – but has not (yet) built eco-systems and platforms at higher levels. Its their customers (fabless). Intel knows that and done that many times over. I make the case that Intel Integrated with IDM 2.0 and ISM 2.0 and being flexible in delivery SoC, SoP and even rack level products to emerging decentralized-edge cloud providers will the emerging opportunity.

Splitting the company will devalue the sum of parts than being whole in this case. While, the point of split (fab) driving accountability and customer focus and serviceability is there, there are perhaps other ways to achieve the same without a formal split while retain the value of integration of the parts.

Smart integration of the various assets and delivery. Creatively combining design engineering, EDA 2.0, BIOS 2.0 and linking it to SoP and SOC manufacturing including field level customization will be a huge value extraction play. The Apple vs Android model of market share vs margin share. IDM 2.0 with ISM 2.0 will get market share and margin share for dominant compute platforms.

A POV – Intel has do 3 things. IDM 2.0 (under way), ISM 2.0 (will elaborate that in a future note) and something else ( aligned with Intel’s manufacturing DNA) truly out of the box before 2030 when its going to be economically and physically hard to get more from semiconductors as we know. That has to be put in place between now and 2030…

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References to EDA at Sun…

Historical CPU/Process Node Data..

$TSLA – Marching towards $10T by 2030……

First Trillionaire and 10 Trillion dollar company.

This is my 4th post on the topic of $TSLA and never thought I would do one in 2021. My predictions was a valuation of $1T by 2030. That will come and pass rather soon.

My first post on $TSLA was back in June, 2017 where the core value long term I thought was Chemistry (Battery) and Intelligence (Full Self Driving/Autonomy). That continues to be the case with Elon’s battery day (Sep’20) & Tesla Autonomy day on April 2019.

So why $10T? That seems to be even more ridiculous than the $1T. Since Feb’20 to now it has gone by 4x and $600B market cap. While there are lots of bears, there are lots of bulls as well for the TSLA case.

Bull Case #1: The bull case is presented by Ark Invest (Source: Ark Invest). Having crossed 500K in 2020 and total of 1M+ with 2 additional factories (Austin and Berlin) yet to come online, getting to 1-2M by 2025 is highly likely and approaching 5M might be difficult, but then Elon has beaten the odds and the market is expecting him to with the demand.

2020Example Bear Case 2025
Cars Sold (millions)0.55Example Bull Case

10
Average Selling Price (ASP)$50,000$45,000$36,000
Electric Vehicle Revenue (billions)$26$234$367
Insurance Revenue (billions)Not Disclosed$23$6
Human-Driven Ride-Hail Revenue (net, billions)$0$42$0
Autonomous Ride-Hail Revenue (net, billions)$0$0$327
Electric Vehicle Gross Margin (ex-credits)21%40%25%
Total Gross Margin21%43%50%
Total EBITDA Margin*14%31%30%
Enterprise Value/EBITDA1621418
Market Cap (billions)673$1,500$4,000
Share Price**$700$1,500$4,000
Free Cash Flow Yield0.4%5%4.2%
Ark Invest Projections

What’s interesting is TSLA has single-handely taken out the $35K- $100K market which the Germans dominate and Toyota tried hard to penetrate with incremental engineering and marketing. TSLA changed the game and will perhaps go as low as $25K but not lower is my guess. TSLA will license IP (Chemistry and Intelligence) and let others make the cars. The entire $35K to $100K is now ‘owned’ by TSLA and its going to be harder for most makers other than the BMW or Mercedes and they will be supported by ardent fans latched onto the brands. 2018 data for segmentation of the various categories is shown here.

2018-worldwide-car-sales-segments

Source: https://carsalesbase.com/global-car-sales-2018/

As you can see from above, 62.8% of the market will be covered by Tesla with Model 3, Model Y, Model S, Cybertruck and perhaps upcoming new China sourced $25K model. That includes the SUV, Midsize, MPV, Pickup, Executive, Sport and Luxury segments. The total market size is 54M cars and if Tesla can get 20% of that category – which actually is possible (we are in winner take all world these days with Amazon, Google, Apple where its tech driven) relative to conventional wisdom of highly fragmented and splintered market for automobiles.

Bull Case #2: Its what I mentioned in the last year. One has to look at TSLA as a business of businesses. Expect in the next 5 years, either take the Alphabet (GOOG) route or via other routes (Spin-offs, M&As, SPACs ….) derivative businesses will emerge and stand on their own. To re-cap

  1. A car company
  2. A Battery company at planet scale
  3. An AI/ML company (machine vision in particular)
  4. An electric storage company
  5. An Electric Utility company (low value but at scale gets interesting)
  6. An energy distribution company
  7. A potential Cloud or computer company (if a book store turns into cloud computing, an autonomous car can have the right assets for becoming a cloud company)
  8. A big data/mapping/navigation company
  9. A carless car company (i.e. Uber/Lyft killer robotaxi)
  10. A machine vision driven robotics company
  11. and more to come….(more than letters in the Alphabet)

Elon himself quoted a version of this back in Oct’2020

Bull Case #3: Chemistry and Intelligence. Every tech category goes through vertical integration and horizontal stratification. I speculate Elon will build down to a $25K car and below that, he will ‘license’ IP (Chemistry and Intelligence or battery tech and autonomy tech) to get worldwide reach. It would not make sense to have factories all over the world for all geos – but a strong IP revenue model ($1-$2K/car) could be had and also enable new players in countries to become car companies – i.e. more local manufacturing and distribution. And not just limited to cars, for all kinds of transportation and perhaps energy sectors. From the chart above the remaining 35% of the segments (Compact, Sub-Compact, City-car) would belong in this category. Of the 86M cars sold in 2018 (I suspect its less in 2021), 30M cars would be in this category. If 20% of the manufacturers pay TSLA $1K-$2K – lets assume $1K – that is $6B of pure profits which is subsidized by the higher end. The TSLA brand will be more valuable and trusted over VW, Mercedes, BMW, Toyota by 2025 that most people would buy a car ‘Tesla powered’. At this rate of battery cost decline (see blow), these manufacturers who cannot afford R&D or manufacturing at scale would do well to buy it off TSLA. This is akin to INTC holding onto x86 and not having an IP model which let ARM into its turf. Imagine if INTC had both a vertically integrated model of CPUs and a licensing model for some components – AAPL would be in Intel’s camp and so would the big three hyperscalers. Pat Gelsinger is trying to get Intel back into that game in 2021 (which we will address in a different blog post). But if TSLA were to choose both models, a vertically integrated model for some categories and an IP or sub-component sale to other categories, they can cover the entire spectrum and make the brand even more ubiquitous and higher moat.

TSLA is handicapped relative to VW and Toyota on manufacturing scale and distribution reach. The aggressive ramp of manufacturing of the car and IP model will broaden the reach and create other businesses (Robo Taxi, Energy Storage/distribution, Cloud computing for AI and many more to come).

Bill Gates famouly said ” We overestimate what we can do in 2 years and underestimate what humanity will achieve in 10″. One has to do a version for Elon. He over-promises what’s coming in 2-3 years, but delivers on a 10 year vision. If you look back what he has said in 2011/2012 – and see what has been accomplished – its not that far off.

We will revisit this blog in 2025 if we have crossed the Ark Invest marker and if TSLA is barrelling past $3-$4T and march towards the first $10T company on the planet (or maybe a collection of companies).

1987 – 2017: SPARC Systems & Computing Epochs

 

30 Years of SPARC systems is this month in July’1987 when Sun 4/260 was launched.  A month before,  I started my professional career at Sun – to be exact June 15, 1987. 16+ years of my professional life was shaped by Sun, SPARC, Systems and more importantly the whole gamut of innovations that Sun did from chips to systems to operating systems to programming languages, covering the entire spectrum of computing architecture. I used to pinch myself for getting paid to work at Sun.  It was one great computer company that changed computing landscape.

 

Sun4_Launch

 

The SPARC story starts with Bill Joy without whom Sun would not be in existence (Bill was the fourth founder, though) as he basically drove re-inventing computing systems at Sun and thus the world at large.  Bill drove  technical direction of computing at Sun and initiated many efforts – Unix/Solaris, Programming languages, RISC to name a few.  David Patterson (UC Berkeley, now at Google) influenced the RISC direction. [David advised students who changed the computing industry and seems like he is involved with the next shift with TPUs @ Google – more later]. I call out Bill amongst the four (Andy Bechtolsheim, Scott Mcnealy, Vinod Khosla) in this context as without Bill, Sun would not have pulled the talent – he was basically a big black hole that sucked all talent across the country/globe. Without that talent, the innovations and the 30 year history of computing would not have been possible. A good architecture is one that lives for 30 years. This one did. Not sure about the next 30. More on this later. Back then, I dropped my PhD on AI (was getting disillusioned with then version of AI) for a Unix on my desktop and Bill Joy. Decision was that simple.

From historic accounts, the SPARC sytem initiative started in 1984. I joined Sun when the Sun 4/260 (Robert Garner was the lead) was going to be announced in July. It was  VME based backplane built both as a pedestal computer (12 VME boards) as well as rack mount system replaced then Sun 3/260 and Sun 3/280.  It housed the first SPARC chip (Sunrise) built out from gate arrays with Fujitsu.

 

This was an important product in the modern era of computing (198X-201X). 1985-87 was  the beginning of exploitation of Instruction level parallelism (ILP) with RISC implementations from Sun and MIPS. IBM/Power followed later, although it was incubated within IBM earlier than both . The guiding principles being, compilers can do better than humans and can generate code that is optimal and simpler with the  orthogonal instruction set. The raging debate then was “can compilers beat humans in generating code for all cases”?. It was settled with the dawn of the RISC era. This was the  era when C (Fortran, Pascal, ADA were other candidates) became the dominant programming language and compilers were growing leaps and bounds in capabilities. Steve Muchnik led the SPARC compilers, while Fred Chow did with MIPs. Recall the big debates about register windows (Bill even to-date argues about the decision on register windows) and code generation.  In brief it was the introduction of pipelining, orthogonal instruction sets and compilers (in some sense compilers were that era’s version of today’s rage in “machine learning” where machines started to outperform human ability to program and generate optimized code).

There were many categories enabled by Sun and the first SPARC system.

  1. The first chip was implemented in a gate array, which was more cost effective as well as faster TTD (Time to Design). The fabless semiconductor was born out of this gate array model and eventually exploited by many companies. A new category emerged in the semiconductor business.
  2. EDA industry starting with Synopsys and their design compiler were enabled and driven by Sun. Verilog as a language for hardware was formalized. It was an event driven evaluation model. Today’s reactive program is yesterday’s verilog (not really, but making a point here that HDL forever was event driven programming).
  3. Create an open eco-system of (effectively free) licensable architecture. It was followed by Opensource for hardware (OpenSPARC) which was a miserable failure.

The first system was followed by the pizza box (SPARCstation 1) using the Sunrise chip. Series of systems innovations were delivered with associated innovations in SPARC.

  1. 1987 Sun4/260 Sunrise – early RISC (gate array)
  2. 1989 SPARCstation 1 (Sunray) – Custom RISC
  3. 1991 Sun LX  (Tsunami) – First SoC
  4. 1992 SPARCstation 10 (Viking) – Desktop MP
  5. 1992 SPARCserver (Viking) – SMP servers
  6. 1995 UltraSPARC 1, Sunfire (Spitfire) – 64 bit, VIS, desktop to servers
  7. 1998 Starfire (Blackbird), Sparcstation 5 (Sabre) – Big SMP
  8. 2001 Serengeti (UltraSPARC III) – Bigger SMP
  9. 2002 Ultra 5 (Jalapeno) – Low Cost MP
  10. 2005 UltraSPARC T-1 (Niagara) – Chip Multi-threading
  11. 2007 UltraSPARC T-2 – Encryption co-processor
  12. 2011 SPARC T4
  13. 2013 SPARC T5, M5
  14. 2015 SPARC M7 (Tahoe)
  15. 2017 M8…

The systems innovations were driven by both SPARC and Solaris or SunOS back then. There are 2 key punctuations in the innovation and we have entered the third era in computing. The first two was led by Sun and I was lucky to be part of that innovation and be able to shape that as well.

1984-1987 was the dawn of the ILP era, which continued on for the next 15 years until thread level parallelism became the architectural thesis thanks to Java, internet and throughput computing. A few things that Sun did was very smart. That includes

  1. Took  a quick and fast approach to implement chip by adoption of gate arrays. This surprised IBM and perhaps MIPS w.r.t speed of execution. Just 2 engineers (Anant Agrawal and Masood Namjoo) did the integer unit. No Floating point. MIPS was meanwhile designing a custom chip
  2. It was immediately followed by Sunrise a full custom chip done with Cypress (for Integer unit) and TI (for floating point unit). Of all the different RISC chips that were designed around the same era, SPARC along with MIPS stood out (eventually Power).
  3. That was the one two punch enabled by Sun owning the architectural paradigm shift (C/Unix/RISC) as compute stack of then.

Industry’s first Pipelining, super scalar (more than 1 instruction/clock) became the drivers of performance. Sun innovated both at the processor level (with compilers) and system level with symmetric multi-processing with operating system to drive the ‘attack of the killer micros‘. A number of success and failures followed the initial RISC (Sunrise based platform).

  1. Suntan was an ECL sparc chip that was built, but not taken to market for two reasons. [Have an ECL board up in my attic]. The debate of CMOS vs ECL was ending with CMOS rapidly gaining speed-power ratio of ECL and more importantly the ability of Sun to continue with ECL would have drained the company relative to the value of the high end of the market. MIPS carried through and perhaps drained significant capital focus by doing so.
  2. SuperSPARC was the first super scalar process that came out in 1991 working with Xerox, Sun delivered the first glue-less SMP (M-bus and X-bus).
  3. 1995 was a 64 bit CPU  (MIPS beat to market – but was too soon) with integrated VIS ( media SIMD instructions)

After that the next big architectural shift was multi-core and threading. It was executed with mainstream Sparc but accelerated with the acquisition of Afara and its Niagara family of CPUs. If there is a ‘hall of fame’ for computer architects, a shout out goes to Les Kohn who led two key innovations – UltraSPARC (64bit, VIS) and UltraSPARC T-1 (multi-threading). Seeds of that shift was sown in 1998 and family of products exploiting multi-core and threading were brought to market starting in 2002/2003.

1998, in my view is the dawn of the second wave of computing in the modern era (1987-2017) in the industry and again Sun drove this transition. The move to web or cloud centric workloads, the emergence of Java as a programming language for enterprise and web applications enabled the shift to TLP – Thread Level Parallelism. In short, this is classical space-time tradeoff where clock rate had diminishing returns and shift to threading and multi-core began with the workload shift. Here again SPARC was the innovator with multi-core and multi-threading. The results of this shift started showing in systems around 2003  – roughly 15 years after the first introduction of SPARC with Sun 4/260.  In that 15 years, computing power grew by 300+ times and memory capacity grew by 128 times, roughly following Moore’s law.

While the first 15 years was the ILP era and the 2nd 15 years was about multi-core and threading (TLP). What is the third? We are dawning upon that era.  I phrase it as ‘MLP’- memory level parallelism.  Maybe not. But we know a few things now. The new computing era is more ‘data path’ oriented – be it GPU, FPGA or TPU – some form of high compute throughput matched by emerging ML/DL applications. A number of key issues have to be addressed.

 

Computing_trends

Every 30 years, technology, business and people have to re-invent themselves otherwise they stand to whither away. There is a pattern there.

There is a pattern here with SPARC as well. SPARC and SPARC based systems have reached 30 year life and it looks to be at the beginning of the end , while a new generation of processing is emerging.

Where do go from here? Defintely applications and technologies are the drivers. ML/DL is the obvious driver. Technologies range from memory, coherent ‘programable datapath accelerators’, programming models (event driven?), user space resource managers/schedulers and lots more. A few but key meta trends

  • The past 30 years – Hardware (Silicon and Systems) aggregated (for e.g. SMP) the resources while Software disaggregated (VMware). I believe the reverse will be true for the next 30 i.e. disaggregated hardware (e.g. accelerators or memory) but software will aggregate (for e.g. vertical NUMA, heterogenous schedulers).
  • Separation of control flow dominated code vs data path oriented code will happen (early signs with TPUs).

 

data_flow

  • Event driven (for e.g. reactive) programming models will become more prevalent. The ‘serverless’ trend will only accelerate this model as traditional programmers (procedural) have to be retrained to do event driven programming/coding (Hardware folks have been doing for decades).
  • We will build machines that will be hard (not in the sense of complexity – more in the sense of scale) for humans to program.

CMOS, RISC, Unix and C was the mantra in 1980s. Its going to be memory (some form of resistive memory structure) and re–thinking of the stack needs to happen. Unix is also 30+ years old.

Then_v_now

 

Just when you thought Moore’s law is slowing, the amalgamation of these emerging concepts  and ideas in a simple but clever system will rise to the next 30 years of innovations in computing.

Strap yourself for the ride…

 

 

OEM -> ODM -> OCM?

The OEM supply chain model has been in existence in multiple industries including computing for a long time. In the computing industry, Original Equipment Model (OEM) was perhaps kickstarted in a formal way in the 1980s  with the emergence of the PC and Intel with its processors. Prior to the PC and perhaps the Apple Mac, in the 70s, computing was delivered by vertically integrated companies. Notable ones are IBM, DEC, Prime, ICL (England), Wang, Sperry, Burroughs etc.  The OEM model led to the separation of the various layers in the delivery chain. Specifically, the chip (or processor) as a business came into full force and the separation of the processor, software (Microsoft) and the delivery of these two as an integrated platform led to the emergence of the OEM business.

Over the past 30 years, the OEM model was supplanted by the ODM (Original Design and Manufacturing) companies (like Quanta, Tyan) from Taiwan and China. That model was perhaps kickstarted in the late 1990s driven by Intel and emergence of the Taiwan/China manufacturing capabilities. This model exploded from 2000 onwards with the emergence of the cloud companies as the end customer.

The value in OEM model is the integration of either silicon (engineered by the OEM) and/or Software. Typically both Silicon and Software (as demonstrated by companies like Sun, Cisco, EMC, SGI and many more).  Over time, the consolidation of the silicon (for processors, it was Intel, for switches – it is Broadcom) combined with the emergence of open source software (Linux to start with, but perhaps a whole lot of other components that is found in apache.org) has eroded the key value proposition. After 30 years, with the consolidation in the industry (EMC/Dell as an example), has the OEM model run its course?

The value in the ODM model is in the manufacturing (cost-effective) and scale. To some extent the ODM model eroded one of the key capabilities of OEM given the consolidation of key semiconductor components (processors, switch/networking ASIC, storage controllers). But the inability of the ODM companies to move up the value chain (either own the silicon or the key SW IP), they have reached a plateau with nowhere to go but continue to manufacture at scale and do it cost effectively. The notion that an ODM can disrupt the OEMs has not happened. Sure, they have had an impact on many companies, but the 70/30 rule applies. The OEMs that have had strong band equity, have retained their position and the only the smaller OEMs have lost their business to ODMs.

Here’s a simple visual of the value chain.

Image result for OEM vs ODM

But is it time now for the emergence of a new model?    The OEM model is now facing a perfect storm. . One component of the perfect storm is the cloud as a business. The second disruptor is the emergence of Software Defined X (Compute, storage, Network) and in many cases tied to open-source . The third element of the disruption and the main disruption is the value shift to the component i.e. the semiconductor component. This I would term as the emergence of the OCM model.

oem_odm_ocm

OCM stands for Original Component Manufacturer as typified by companies like Intel, Broadcom but the more interesting ones are Seagate, Western Digital, Micron, Samsung.  The visual above show the three different supply chain models. The OEM model relies on the ODM as well to deliver the end system to the customer. The OCM model as typified by component companies (one good example is Mellanox – which sells chips and switches) leveraging either 3rd party or open source software to deliver system level solution to the same target customers that OEMs have addressed. While there are significant challenges in the evolution of OCM to have the same capability as the OEM, the OCM already have customers like the big cloud providers (AWS, Google, Microsoft). with a significant portion of their business (soon to be 40%) being protected by direct sell to these cloud providers which will grow while potentially  seeing reduction in profit margins. This has two effects for the OCMs. They have to find alternative higher margin (absolute margin) models as well as being able to challenge OEMs and ODMs as a good percentage of their business is already shifting to major cloud providers.

So, will these OCMs emerge? Back to the Wintel model of value shifting to component and software, but in the case, the OCM becomes the integrator of the SW along with the component to deliver a complete system. Unlike the ODM, the OCM has both financial and technical capabilities to move up the value chain.

Lets revisit this in 2020 and see if this happens.

Update – March 2019 – Nvidia to acquire Mellanox. Both companies designs and sells chips and makes boxes. Nvidia with DGX-2 (ML boxes) and Mellanox with switches..

https://nvidianews.nvidia.com/news/nvidia-to-acquire-mellanox-for-6-9-billion

wrong tool

You are finite. Zathras is finite. This is wrong tool.

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